Network-on-chip : : the next generation of system-on-chip integration / / Santanu Kundu, Santanu Chattopadhyay.
Addresses the Challenges Associated with System-on-Chip Integration Network-on-Chip: The Next Generation of System-on-Chip Integration examines the current issues restricting chip-on-chip communication efficiency, and explores Network-on-chip (NoC), a promising alternative that equips designers with...
Saved in:
VerfasserIn: | |
---|---|
TeilnehmendeR: | |
Place / Publishing House: | Boca Raton, FL : : Taylor & Francis,, 2014. |
Year of Publication: | 2014 |
Language: | English |
Physical Description: | 1 online resource (xvii, 369 pages) :; illustrations |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Table of Contents:
- 1. Introduction
- 2. Interconnection networks in network-on-chip
- 3. Architecture design of network-on-chip
- 4. Evaluation of network-on-chip architectures
- 5. Application mapping on network-on-chip
- 6. Low-power techniques for network-on-chip
- 7. Signal integrity and reliability of network-on-chip
- 8. Testing of network-on-chip architectures
- 9. Application-specific network-on-chip synthesis
- 10. Reconfigurable network-on-chip design
- 11. Three-dimensional integration of network-on-chip
- 12. Conclusions and future trends.