Antenna-On-Chip : : Design, Challenges, and Opportunities.
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Place / Publishing House: | Norwood : : Artech House,, 2021. ©2021. |
Year of Publication: | 2021 |
Edition: | 1st ed. |
Language: | English |
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Physical Description: | 1 online resource (275 pages) |
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Cheema, Hammad M. Antenna-On-Chip : Design, Challenges, and Opportunities. 1st ed. Norwood : Artech House, 2021. ©2021. 1 online resource (275 pages) text txt rdacontent computer c rdamedia online resource cr rdacarrier Intro -- Antenna-on-Chip: Design, Challenges, and Opportunities -- Contents -- Preface -- 1 Introduction to Antenna on Chip -- 1.1 Antennas and ICs: A Brief History -- 1.2 Circuit Integration Technologies -- 1.2.1 Interconnection Technologies -- 1.2.2 MCMs -- 1.2.3 SiP -- 1.2.4 SoP -- 1.2.5 SoC -- 1.3 On-Chip Antennas: Benefits and Opportunities -- 1.3.1 Cost and Size -- 1.3.2 The 50Ω Boundary: Not Needed Anymore -- 1.3.3 Integration and Robustness -- 1.3.4 Fabrication Precision and Repeatability -- 1.4 AoC: An Inevitable Choice for the Future -- 1.5 Conclusion -- References -- 2 Design and Implementation Challenges -- 2.1 Incompatible Silicon Substrate -- 2.1.1 Low Resistivity of Silicon -- 2.1.2 High Dielectric Constant of Silicon -- 2.1.3 Surface Waves -- 2.2 Limitations of the CMOS Stack-Up -- 2.3 Modeling and Simulation Challenges -- 2.3.1 Cosimulation Tools -- 2.4 Size and Layout Challenges -- 2.4.1 DRC -- 2.5 Fabrication Tolerances -- 2.6 Coupling and Interference Issues -- 2.6.1 Coupling from the Antenna to the Circuit -- 2.6.2 Coupling from Circuits to the Antenna -- 2.7 Characterization Challenges -- 2.7.1 Reflection from the Probe -- 2.7.2 Radiation of the Probe -- 2.7.3 Radiation Blockage or Shadowing -- 2.7.4 AUT Movement Restrictions -- 2.7.5 Measurement of Standalone Antennas -- 2.8 Packaging Challenges -- 2.9 Conclusion -- References -- 3 Radiation Enhancement and Measurement Techniques -- 3.1 Substrate Post-Processing Techniques -- 3.1.1 Substrate Thinning -- 3.1.2 High-Resistivity Substrates -- 3.1.3 Substrate Micromachining -- 3.2 On-Chip Reflecting Surfaces -- 3.2.1 AMCs -- 3.3 Off-Chip Techniques -- 3.3.1 Dielectric Superstrates -- 3.3.2 Artificial Dielectric Layers -- 3.3.3 Dielectric Resonator Loading -- 3.3.4 Dielectric Lens -- 3.4 3-D and MEMS-Based Antennas -- 3.4.1 Suspended Antennas -- 3.4.2 Vertical Monopoles. 3.4.3 Movable Antennas -- 3.4.4 BWAs -- 3.5 Measurement and Characterization Techniques -- 3.5.1 Mitigating the Effects of On-Chip Circuits -- 3.5.2 Mitigating the Effects of Measurement Setup -- 3.6 Conclusion -- References -- 4 Codesign of Circuits and Antennas -- 4.1 Codesign Considerations -- 4.1.1 AoC in Receiver -- 4.1.2 AoC in Transmitter -- 4.1.3 AoC in the Transceiver -- 4.2 Choice of Transistor Technology -- 4.3 Impedance Matching -- 4.3.1 LNA-Antenna Matching -- 4.3.2 PA-Antenna Matching -- 4.3.3 T/R Switch-Antenna Matching -- 4.4 Circuit-Compatible Antenna Layout and Design -- 4.4.1 Size and Layout Codesign -- 4.4.2 Differential and Single-Ended Feeding -- 4.4.3 On-Chip Antennas with Added Functionality -- 4.5 Codesign to Prevent Antenna-Circuit Coupling -- 4.6 Antenna Circuit Cosimulation -- 4.7 Codesign of Package and Antenna -- 4.7.1 Packaging Design Considerations -- 4.7.2 Packaging Materials -- 4.7.3 Codesign for Performance Enhancement -- 4.8 Conclusion -- References -- 5 AoC Design Example -- 5.1 Design Flow -- 5.2 71-GHz Oscillator Transmitter with an On-Chip Monopole Antenna -- 5.3 Antenna Simulation -- 5.3.1 Substrate -- 5.3.2 Antenna Element -- 5.3.3 AMC -- 5.3.4 Superstrate Layer -- 5.3.5 Lens Integrated Package -- 5.4 Circuit Simulation -- 5.4.1 Adding a Design Library -- 5.4.2 Schematic Design -- 5.4.3 Layout Design -- 5.4.4 DRC -- 5.4.5 LVS -- 5.4.6 Parasitic Extraction -- 5.4.7 Post-Layout Simulation -- 5.5 Cosimulation -- 5.5.1 Simulating the Circuit in EM Simulator -- 5.5.2 Simulating the Antenna in the IC Simulator -- 5.6 Fabrication -- 5.7 Measurement and Characterization -- 5.7.1 Standalone Characterization -- 5.7.2 Active Characterization -- 5.8 Conclusion -- References -- 6 Future Trends in AoC -- 6.1 Performance Enhancement: A Continuing Challenge -- 6.2 Codesign and Multifunctional Role of AoC. 6.3 Specialized Radios and Implantable Applications -- 6.4 Energy-Harvesting AoCs -- 6.5 Miniaturization of Low-Frequency AoCs -- 6.6 Terahertz Applications -- 6.7 MEMS and CMOS Codesign -- 6.8 Wireless Networks on Chip -- 6.9 Future Role of Foundries in AoC -- 6.10 Advances in Simulation and Measurement -- 6.11 Conclusion -- References -- Acronyms -- About the Authors -- Index. Description based on publisher supplied metadata and other sources. Electronic reproduction. Ann Arbor, Michigan : ProQuest Ebook Central, 2024. Available via World Wide Web. Access may be limited to ProQuest Ebook Central affiliated libraries. Antennas (Electronics). Integrated circuits. Electronic books. Khalid, Fatima. Shamim, Atif. Print version: Cheema, Hammad M. Antenna-On-Chip Norwood : Artech House,c2021 9781608078189 ProQuest (Firm) https://ebookcentral.proquest.com/lib/oeawat/detail.action?docID=6683917 Click to View |
language |
English |
format |
eBook |
author |
Cheema, Hammad M. |
spellingShingle |
Cheema, Hammad M. Antenna-On-Chip : Design, Challenges, and Opportunities. Intro -- Antenna-on-Chip: Design, Challenges, and Opportunities -- Contents -- Preface -- 1 Introduction to Antenna on Chip -- 1.1 Antennas and ICs: A Brief History -- 1.2 Circuit Integration Technologies -- 1.2.1 Interconnection Technologies -- 1.2.2 MCMs -- 1.2.3 SiP -- 1.2.4 SoP -- 1.2.5 SoC -- 1.3 On-Chip Antennas: Benefits and Opportunities -- 1.3.1 Cost and Size -- 1.3.2 The 50Ω Boundary: Not Needed Anymore -- 1.3.3 Integration and Robustness -- 1.3.4 Fabrication Precision and Repeatability -- 1.4 AoC: An Inevitable Choice for the Future -- 1.5 Conclusion -- References -- 2 Design and Implementation Challenges -- 2.1 Incompatible Silicon Substrate -- 2.1.1 Low Resistivity of Silicon -- 2.1.2 High Dielectric Constant of Silicon -- 2.1.3 Surface Waves -- 2.2 Limitations of the CMOS Stack-Up -- 2.3 Modeling and Simulation Challenges -- 2.3.1 Cosimulation Tools -- 2.4 Size and Layout Challenges -- 2.4.1 DRC -- 2.5 Fabrication Tolerances -- 2.6 Coupling and Interference Issues -- 2.6.1 Coupling from the Antenna to the Circuit -- 2.6.2 Coupling from Circuits to the Antenna -- 2.7 Characterization Challenges -- 2.7.1 Reflection from the Probe -- 2.7.2 Radiation of the Probe -- 2.7.3 Radiation Blockage or Shadowing -- 2.7.4 AUT Movement Restrictions -- 2.7.5 Measurement of Standalone Antennas -- 2.8 Packaging Challenges -- 2.9 Conclusion -- References -- 3 Radiation Enhancement and Measurement Techniques -- 3.1 Substrate Post-Processing Techniques -- 3.1.1 Substrate Thinning -- 3.1.2 High-Resistivity Substrates -- 3.1.3 Substrate Micromachining -- 3.2 On-Chip Reflecting Surfaces -- 3.2.1 AMCs -- 3.3 Off-Chip Techniques -- 3.3.1 Dielectric Superstrates -- 3.3.2 Artificial Dielectric Layers -- 3.3.3 Dielectric Resonator Loading -- 3.3.4 Dielectric Lens -- 3.4 3-D and MEMS-Based Antennas -- 3.4.1 Suspended Antennas -- 3.4.2 Vertical Monopoles. 3.4.3 Movable Antennas -- 3.4.4 BWAs -- 3.5 Measurement and Characterization Techniques -- 3.5.1 Mitigating the Effects of On-Chip Circuits -- 3.5.2 Mitigating the Effects of Measurement Setup -- 3.6 Conclusion -- References -- 4 Codesign of Circuits and Antennas -- 4.1 Codesign Considerations -- 4.1.1 AoC in Receiver -- 4.1.2 AoC in Transmitter -- 4.1.3 AoC in the Transceiver -- 4.2 Choice of Transistor Technology -- 4.3 Impedance Matching -- 4.3.1 LNA-Antenna Matching -- 4.3.2 PA-Antenna Matching -- 4.3.3 T/R Switch-Antenna Matching -- 4.4 Circuit-Compatible Antenna Layout and Design -- 4.4.1 Size and Layout Codesign -- 4.4.2 Differential and Single-Ended Feeding -- 4.4.3 On-Chip Antennas with Added Functionality -- 4.5 Codesign to Prevent Antenna-Circuit Coupling -- 4.6 Antenna Circuit Cosimulation -- 4.7 Codesign of Package and Antenna -- 4.7.1 Packaging Design Considerations -- 4.7.2 Packaging Materials -- 4.7.3 Codesign for Performance Enhancement -- 4.8 Conclusion -- References -- 5 AoC Design Example -- 5.1 Design Flow -- 5.2 71-GHz Oscillator Transmitter with an On-Chip Monopole Antenna -- 5.3 Antenna Simulation -- 5.3.1 Substrate -- 5.3.2 Antenna Element -- 5.3.3 AMC -- 5.3.4 Superstrate Layer -- 5.3.5 Lens Integrated Package -- 5.4 Circuit Simulation -- 5.4.1 Adding a Design Library -- 5.4.2 Schematic Design -- 5.4.3 Layout Design -- 5.4.4 DRC -- 5.4.5 LVS -- 5.4.6 Parasitic Extraction -- 5.4.7 Post-Layout Simulation -- 5.5 Cosimulation -- 5.5.1 Simulating the Circuit in EM Simulator -- 5.5.2 Simulating the Antenna in the IC Simulator -- 5.6 Fabrication -- 5.7 Measurement and Characterization -- 5.7.1 Standalone Characterization -- 5.7.2 Active Characterization -- 5.8 Conclusion -- References -- 6 Future Trends in AoC -- 6.1 Performance Enhancement: A Continuing Challenge -- 6.2 Codesign and Multifunctional Role of AoC. 6.3 Specialized Radios and Implantable Applications -- 6.4 Energy-Harvesting AoCs -- 6.5 Miniaturization of Low-Frequency AoCs -- 6.6 Terahertz Applications -- 6.7 MEMS and CMOS Codesign -- 6.8 Wireless Networks on Chip -- 6.9 Future Role of Foundries in AoC -- 6.10 Advances in Simulation and Measurement -- 6.11 Conclusion -- References -- Acronyms -- About the Authors -- Index. |
author_facet |
Cheema, Hammad M. Khalid, Fatima. Shamim, Atif. |
author_variant |
h m c hm hmc |
author2 |
Khalid, Fatima. Shamim, Atif. |
author2_variant |
f k fk a s as |
author2_role |
TeilnehmendeR TeilnehmendeR |
author_sort |
Cheema, Hammad M. |
title |
Antenna-On-Chip : Design, Challenges, and Opportunities. |
title_sub |
Design, Challenges, and Opportunities. |
title_full |
Antenna-On-Chip : Design, Challenges, and Opportunities. |
title_fullStr |
Antenna-On-Chip : Design, Challenges, and Opportunities. |
title_full_unstemmed |
Antenna-On-Chip : Design, Challenges, and Opportunities. |
title_auth |
Antenna-On-Chip : Design, Challenges, and Opportunities. |
title_new |
Antenna-On-Chip : |
title_sort |
antenna-on-chip : design, challenges, and opportunities. |
publisher |
Artech House, |
publishDate |
2021 |
physical |
1 online resource (275 pages) |
edition |
1st ed. |
contents |
Intro -- Antenna-on-Chip: Design, Challenges, and Opportunities -- Contents -- Preface -- 1 Introduction to Antenna on Chip -- 1.1 Antennas and ICs: A Brief History -- 1.2 Circuit Integration Technologies -- 1.2.1 Interconnection Technologies -- 1.2.2 MCMs -- 1.2.3 SiP -- 1.2.4 SoP -- 1.2.5 SoC -- 1.3 On-Chip Antennas: Benefits and Opportunities -- 1.3.1 Cost and Size -- 1.3.2 The 50Ω Boundary: Not Needed Anymore -- 1.3.3 Integration and Robustness -- 1.3.4 Fabrication Precision and Repeatability -- 1.4 AoC: An Inevitable Choice for the Future -- 1.5 Conclusion -- References -- 2 Design and Implementation Challenges -- 2.1 Incompatible Silicon Substrate -- 2.1.1 Low Resistivity of Silicon -- 2.1.2 High Dielectric Constant of Silicon -- 2.1.3 Surface Waves -- 2.2 Limitations of the CMOS Stack-Up -- 2.3 Modeling and Simulation Challenges -- 2.3.1 Cosimulation Tools -- 2.4 Size and Layout Challenges -- 2.4.1 DRC -- 2.5 Fabrication Tolerances -- 2.6 Coupling and Interference Issues -- 2.6.1 Coupling from the Antenna to the Circuit -- 2.6.2 Coupling from Circuits to the Antenna -- 2.7 Characterization Challenges -- 2.7.1 Reflection from the Probe -- 2.7.2 Radiation of the Probe -- 2.7.3 Radiation Blockage or Shadowing -- 2.7.4 AUT Movement Restrictions -- 2.7.5 Measurement of Standalone Antennas -- 2.8 Packaging Challenges -- 2.9 Conclusion -- References -- 3 Radiation Enhancement and Measurement Techniques -- 3.1 Substrate Post-Processing Techniques -- 3.1.1 Substrate Thinning -- 3.1.2 High-Resistivity Substrates -- 3.1.3 Substrate Micromachining -- 3.2 On-Chip Reflecting Surfaces -- 3.2.1 AMCs -- 3.3 Off-Chip Techniques -- 3.3.1 Dielectric Superstrates -- 3.3.2 Artificial Dielectric Layers -- 3.3.3 Dielectric Resonator Loading -- 3.3.4 Dielectric Lens -- 3.4 3-D and MEMS-Based Antennas -- 3.4.1 Suspended Antennas -- 3.4.2 Vertical Monopoles. 3.4.3 Movable Antennas -- 3.4.4 BWAs -- 3.5 Measurement and Characterization Techniques -- 3.5.1 Mitigating the Effects of On-Chip Circuits -- 3.5.2 Mitigating the Effects of Measurement Setup -- 3.6 Conclusion -- References -- 4 Codesign of Circuits and Antennas -- 4.1 Codesign Considerations -- 4.1.1 AoC in Receiver -- 4.1.2 AoC in Transmitter -- 4.1.3 AoC in the Transceiver -- 4.2 Choice of Transistor Technology -- 4.3 Impedance Matching -- 4.3.1 LNA-Antenna Matching -- 4.3.2 PA-Antenna Matching -- 4.3.3 T/R Switch-Antenna Matching -- 4.4 Circuit-Compatible Antenna Layout and Design -- 4.4.1 Size and Layout Codesign -- 4.4.2 Differential and Single-Ended Feeding -- 4.4.3 On-Chip Antennas with Added Functionality -- 4.5 Codesign to Prevent Antenna-Circuit Coupling -- 4.6 Antenna Circuit Cosimulation -- 4.7 Codesign of Package and Antenna -- 4.7.1 Packaging Design Considerations -- 4.7.2 Packaging Materials -- 4.7.3 Codesign for Performance Enhancement -- 4.8 Conclusion -- References -- 5 AoC Design Example -- 5.1 Design Flow -- 5.2 71-GHz Oscillator Transmitter with an On-Chip Monopole Antenna -- 5.3 Antenna Simulation -- 5.3.1 Substrate -- 5.3.2 Antenna Element -- 5.3.3 AMC -- 5.3.4 Superstrate Layer -- 5.3.5 Lens Integrated Package -- 5.4 Circuit Simulation -- 5.4.1 Adding a Design Library -- 5.4.2 Schematic Design -- 5.4.3 Layout Design -- 5.4.4 DRC -- 5.4.5 LVS -- 5.4.6 Parasitic Extraction -- 5.4.7 Post-Layout Simulation -- 5.5 Cosimulation -- 5.5.1 Simulating the Circuit in EM Simulator -- 5.5.2 Simulating the Antenna in the IC Simulator -- 5.6 Fabrication -- 5.7 Measurement and Characterization -- 5.7.1 Standalone Characterization -- 5.7.2 Active Characterization -- 5.8 Conclusion -- References -- 6 Future Trends in AoC -- 6.1 Performance Enhancement: A Continuing Challenge -- 6.2 Codesign and Multifunctional Role of AoC. 6.3 Specialized Radios and Implantable Applications -- 6.4 Energy-Harvesting AoCs -- 6.5 Miniaturization of Low-Frequency AoCs -- 6.6 Terahertz Applications -- 6.7 MEMS and CMOS Codesign -- 6.8 Wireless Networks on Chip -- 6.9 Future Role of Foundries in AoC -- 6.10 Advances in Simulation and Measurement -- 6.11 Conclusion -- References -- Acronyms -- About the Authors -- Index. |
isbn |
9781608078196 9781608078189 |
callnumber-first |
T - Technology |
callnumber-subject |
TK - Electrical and Nuclear Engineering |
callnumber-label |
TK7871 |
callnumber-sort |
TK 47871.6 |
genre |
Electronic books. |
genre_facet |
Electronic books. |
url |
https://ebookcentral.proquest.com/lib/oeawat/detail.action?docID=6683917 |
illustrated |
Not Illustrated |
dewey-hundreds |
600 - Technology |
dewey-tens |
620 - Engineering |
dewey-ones |
621 - Applied physics |
dewey-full |
621.3824 |
dewey-sort |
3621.3824 |
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621.3824 |
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621.3824 |
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1263027647 |
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