Antenna-On-Chip : : Design, Challenges, and Opportunities.
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Place / Publishing House: | Norwood : : Artech House,, 2021. ©2021. |
Year of Publication: | 2021 |
Edition: | 1st ed. |
Language: | English |
Online Access: | |
Physical Description: | 1 online resource (275 pages) |
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008 | 240229s2021 xx o ||||0 eng d | ||
020 | |a 9781608078196 |q (electronic bk.) | ||
020 | |z 9781608078189 | ||
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050 | 4 | |a TK7871.6 | |
082 | 0 | |a 621.3824 | |
100 | 1 | |a Cheema, Hammad M. | |
245 | 1 | 0 | |a Antenna-On-Chip : |b Design, Challenges, and Opportunities. |
250 | |a 1st ed. | ||
264 | 1 | |a Norwood : |b Artech House, |c 2021. | |
264 | 4 | |c ©2021. | |
300 | |a 1 online resource (275 pages) | ||
336 | |a text |b txt |2 rdacontent | ||
337 | |a computer |b c |2 rdamedia | ||
338 | |a online resource |b cr |2 rdacarrier | ||
505 | 0 | |a Intro -- Antenna-on-Chip: Design, Challenges, and Opportunities -- Contents -- Preface -- 1 Introduction to Antenna on Chip -- 1.1 Antennas and ICs: A Brief History -- 1.2 Circuit Integration Technologies -- 1.2.1 Interconnection Technologies -- 1.2.2 MCMs -- 1.2.3 SiP -- 1.2.4 SoP -- 1.2.5 SoC -- 1.3 On-Chip Antennas: Benefits and Opportunities -- 1.3.1 Cost and Size -- 1.3.2 The 50Ω Boundary: Not Needed Anymore -- 1.3.3 Integration and Robustness -- 1.3.4 Fabrication Precision and Repeatability -- 1.4 AoC: An Inevitable Choice for the Future -- 1.5 Conclusion -- References -- 2 Design and Implementation Challenges -- 2.1 Incompatible Silicon Substrate -- 2.1.1 Low Resistivity of Silicon -- 2.1.2 High Dielectric Constant of Silicon -- 2.1.3 Surface Waves -- 2.2 Limitations of the CMOS Stack-Up -- 2.3 Modeling and Simulation Challenges -- 2.3.1 Cosimulation Tools -- 2.4 Size and Layout Challenges -- 2.4.1 DRC -- 2.5 Fabrication Tolerances -- 2.6 Coupling and Interference Issues -- 2.6.1 Coupling from the Antenna to the Circuit -- 2.6.2 Coupling from Circuits to the Antenna -- 2.7 Characterization Challenges -- 2.7.1 Reflection from the Probe -- 2.7.2 Radiation of the Probe -- 2.7.3 Radiation Blockage or Shadowing -- 2.7.4 AUT Movement Restrictions -- 2.7.5 Measurement of Standalone Antennas -- 2.8 Packaging Challenges -- 2.9 Conclusion -- References -- 3 Radiation Enhancement and Measurement Techniques -- 3.1 Substrate Post-Processing Techniques -- 3.1.1 Substrate Thinning -- 3.1.2 High-Resistivity Substrates -- 3.1.3 Substrate Micromachining -- 3.2 On-Chip Reflecting Surfaces -- 3.2.1 AMCs -- 3.3 Off-Chip Techniques -- 3.3.1 Dielectric Superstrates -- 3.3.2 Artificial Dielectric Layers -- 3.3.3 Dielectric Resonator Loading -- 3.3.4 Dielectric Lens -- 3.4 3-D and MEMS-Based Antennas -- 3.4.1 Suspended Antennas -- 3.4.2 Vertical Monopoles. | |
505 | 8 | |a 3.4.3 Movable Antennas -- 3.4.4 BWAs -- 3.5 Measurement and Characterization Techniques -- 3.5.1 Mitigating the Effects of On-Chip Circuits -- 3.5.2 Mitigating the Effects of Measurement Setup -- 3.6 Conclusion -- References -- 4 Codesign of Circuits and Antennas -- 4.1 Codesign Considerations -- 4.1.1 AoC in Receiver -- 4.1.2 AoC in Transmitter -- 4.1.3 AoC in the Transceiver -- 4.2 Choice of Transistor Technology -- 4.3 Impedance Matching -- 4.3.1 LNA-Antenna Matching -- 4.3.2 PA-Antenna Matching -- 4.3.3 T/R Switch-Antenna Matching -- 4.4 Circuit-Compatible Antenna Layout and Design -- 4.4.1 Size and Layout Codesign -- 4.4.2 Differential and Single-Ended Feeding -- 4.4.3 On-Chip Antennas with Added Functionality -- 4.5 Codesign to Prevent Antenna-Circuit Coupling -- 4.6 Antenna Circuit Cosimulation -- 4.7 Codesign of Package and Antenna -- 4.7.1 Packaging Design Considerations -- 4.7.2 Packaging Materials -- 4.7.3 Codesign for Performance Enhancement -- 4.8 Conclusion -- References -- 5 AoC Design Example -- 5.1 Design Flow -- 5.2 71-GHz Oscillator Transmitter with an On-Chip Monopole Antenna -- 5.3 Antenna Simulation -- 5.3.1 Substrate -- 5.3.2 Antenna Element -- 5.3.3 AMC -- 5.3.4 Superstrate Layer -- 5.3.5 Lens Integrated Package -- 5.4 Circuit Simulation -- 5.4.1 Adding a Design Library -- 5.4.2 Schematic Design -- 5.4.3 Layout Design -- 5.4.4 DRC -- 5.4.5 LVS -- 5.4.6 Parasitic Extraction -- 5.4.7 Post-Layout Simulation -- 5.5 Cosimulation -- 5.5.1 Simulating the Circuit in EM Simulator -- 5.5.2 Simulating the Antenna in the IC Simulator -- 5.6 Fabrication -- 5.7 Measurement and Characterization -- 5.7.1 Standalone Characterization -- 5.7.2 Active Characterization -- 5.8 Conclusion -- References -- 6 Future Trends in AoC -- 6.1 Performance Enhancement: A Continuing Challenge -- 6.2 Codesign and Multifunctional Role of AoC. | |
505 | 8 | |a 6.3 Specialized Radios and Implantable Applications -- 6.4 Energy-Harvesting AoCs -- 6.5 Miniaturization of Low-Frequency AoCs -- 6.6 Terahertz Applications -- 6.7 MEMS and CMOS Codesign -- 6.8 Wireless Networks on Chip -- 6.9 Future Role of Foundries in AoC -- 6.10 Advances in Simulation and Measurement -- 6.11 Conclusion -- References -- Acronyms -- About the Authors -- Index. | |
588 | |a Description based on publisher supplied metadata and other sources. | ||
590 | |a Electronic reproduction. Ann Arbor, Michigan : ProQuest Ebook Central, 2024. Available via World Wide Web. Access may be limited to ProQuest Ebook Central affiliated libraries. | ||
650 | 0 | |a Antennas (Electronics). | |
650 | 0 | |a Integrated circuits. | |
655 | 4 | |a Electronic books. | |
700 | 1 | |a Khalid, Fatima. | |
700 | 1 | |a Shamim, Atif. | |
776 | 0 | 8 | |i Print version: |a Cheema, Hammad M. |t Antenna-On-Chip |d Norwood : Artech House,c2021 |z 9781608078189 |
797 | 2 | |a ProQuest (Firm) | |
856 | 4 | 0 | |u https://ebookcentral.proquest.com/lib/oeawat/detail.action?docID=6683917 |z Click to View |