A Primer on Memory Consistency and Cache Coherence, Second Edition / by Vijay Nagarajan, Daniel J. Sorin, Mark D. Hill, David A. Wood.

Many modern computer systems, including homogeneous and heterogeneous architectures, support shared memory in hardware. In a shared memory system, each of the processor cores may read and write to a single shared address space. For a shared memory machine, the memory consistency model defines the ar...

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Superior document:Synthesis Lectures on Computer Architecture,
VerfasserIn:
Place / Publishing House:Cham : : Springer International Publishing :, Imprint: Springer,, 2020.
Year of Publication:2020
Edition:2nd ed. 2020.
Language:English
Series:Synthesis Lectures on Computer Architecture,
Physical Description:1 online resource (XX, 276 p.)
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spelling Nagarajan, Vijay. author. aut http://id.loc.gov/vocabulary/relators/aut
A Primer on Memory Consistency and Cache Coherence, Second Edition [electronic resource] / by Vijay Nagarajan, Daniel J. Sorin, Mark D. Hill, David A. Wood.
2nd ed. 2020.
Cham : Springer International Publishing : Imprint: Springer, 2020.
1 online resource (XX, 276 p.)
text txt rdacontent
computer c rdamedia
online resource cr rdacarrier
Synthesis Lectures on Computer Architecture, 1935-3243
Preface to the Second Edition -- Preface to the First Edition -- Introduction to Consistency and Coherence -- Coherence Basics -- Memory Consistency Motivation and Sequential Consistency -- Total Store Order and the \lowercase {X -- Relaxed Memory Consistency -- Coherence Protocols -- Snooping Coherence Protocols -- Directory Coherence Protocols -- Advanced Topics in Coherence -- Consistency and Coherence for Heterogeneous Systems -- Specifying and Validating Memory Consistency Models and Cache Coherence -- Authors' Biographies .
Many modern computer systems, including homogeneous and heterogeneous architectures, support shared memory in hardware. In a shared memory system, each of the processor cores may read and write to a single shared address space. For a shared memory machine, the memory consistency model defines the architecturally visible behavior of its memory system. Consistency definitions provide rules about loads and stores (or memory reads and writes) and how they act upon memory. As part of supporting a memory consistency model, many machines also provide cache coherence protocols that ensure that multiple cached copies of data are kept up-to-date. The goal of this primer is to provide readers with a basic understanding of consistency and coherence. This understanding includes both the issues that must be solved as well as a variety of solutions. We present both high-level concepts as well as specific, concrete examples from real-world systems. This second edition reflects a decade of advancements since the first edition and includes, among other more modest changes, two new chapters: one on consistency and coherence for non-CPU accelerators (with a focus on GPUs) and one that points to formal work and tools on consistency and coherence.
Open Access
Electronic circuits.
Microprocessors.
Computer architecture.
Electronic Circuits and Systems.
Processor Architectures.
3-031-00061-7
3-031-00636-4
Sorin, Daniel J. author. aut http://id.loc.gov/vocabulary/relators/aut
Hill, Mark D. author. aut http://id.loc.gov/vocabulary/relators/aut
Wood, David A. author. aut http://id.loc.gov/vocabulary/relators/aut
language English
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author Nagarajan, Vijay.
Nagarajan, Vijay.
Sorin, Daniel J.
Hill, Mark D.
Wood, David A.
spellingShingle Nagarajan, Vijay.
Nagarajan, Vijay.
Sorin, Daniel J.
Hill, Mark D.
Wood, David A.
A Primer on Memory Consistency and Cache Coherence, Second Edition
Synthesis Lectures on Computer Architecture,
Preface to the Second Edition -- Preface to the First Edition -- Introduction to Consistency and Coherence -- Coherence Basics -- Memory Consistency Motivation and Sequential Consistency -- Total Store Order and the \lowercase {X -- Relaxed Memory Consistency -- Coherence Protocols -- Snooping Coherence Protocols -- Directory Coherence Protocols -- Advanced Topics in Coherence -- Consistency and Coherence for Heterogeneous Systems -- Specifying and Validating Memory Consistency Models and Cache Coherence -- Authors' Biographies .
author_facet Nagarajan, Vijay.
Nagarajan, Vijay.
Sorin, Daniel J.
Hill, Mark D.
Wood, David A.
Sorin, Daniel J.
Sorin, Daniel J.
Hill, Mark D.
Hill, Mark D.
Wood, David A.
Wood, David A.
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author2 Sorin, Daniel J.
Sorin, Daniel J.
Hill, Mark D.
Hill, Mark D.
Wood, David A.
Wood, David A.
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author_sort Nagarajan, Vijay.
title A Primer on Memory Consistency and Cache Coherence, Second Edition
title_full A Primer on Memory Consistency and Cache Coherence, Second Edition [electronic resource] / by Vijay Nagarajan, Daniel J. Sorin, Mark D. Hill, David A. Wood.
title_fullStr A Primer on Memory Consistency and Cache Coherence, Second Edition [electronic resource] / by Vijay Nagarajan, Daniel J. Sorin, Mark D. Hill, David A. Wood.
title_full_unstemmed A Primer on Memory Consistency and Cache Coherence, Second Edition [electronic resource] / by Vijay Nagarajan, Daniel J. Sorin, Mark D. Hill, David A. Wood.
title_auth A Primer on Memory Consistency and Cache Coherence, Second Edition
title_new A Primer on Memory Consistency and Cache Coherence, Second Edition
title_sort a primer on memory consistency and cache coherence, second edition
series Synthesis Lectures on Computer Architecture,
series2 Synthesis Lectures on Computer Architecture,
publisher Springer International Publishing : Imprint: Springer,
publishDate 2020
physical 1 online resource (XX, 276 p.)
edition 2nd ed. 2020.
contents Preface to the Second Edition -- Preface to the First Edition -- Introduction to Consistency and Coherence -- Coherence Basics -- Memory Consistency Motivation and Sequential Consistency -- Total Store Order and the \lowercase {X -- Relaxed Memory Consistency -- Coherence Protocols -- Snooping Coherence Protocols -- Directory Coherence Protocols -- Advanced Topics in Coherence -- Consistency and Coherence for Heterogeneous Systems -- Specifying and Validating Memory Consistency Models and Cache Coherence -- Authors' Biographies .
isbn 3-031-01764-1
3-031-00061-7
3-031-00636-4
issn 1935-3243
callnumber-first T - Technology
callnumber-subject TK - Electrical and Nuclear Engineering
callnumber-label TK7867-7867
callnumber-sort TK 47867 47867.5
illustrated Not Illustrated
dewey-hundreds 600 - Technology
dewey-tens 620 - Engineering
dewey-ones 621 - Applied physics
dewey-full 621.3815
dewey-sort 3621.3815
dewey-raw 621.3815
dewey-search 621.3815
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