A Primer on Memory Consistency and Cache Coherence, Second Edition / / by Vijay Nagarajan, Daniel J. Sorin, Mark D. Hill, David A. Wood.

Many modern computer systems, including homogeneous and heterogeneous architectures, support shared memory in hardware. In a shared memory system, each of the processor cores may read and write to a single shared address space. For a shared memory machine, the memory consistency model defines the ar...

Full description

Saved in:
Bibliographic Details
Superior document:Synthesis Lectures on Computer Architecture,
VerfasserIn:
Place / Publishing House:Cham : : Springer International Publishing :, Imprint: Springer,, 2020.
Year of Publication:2020
Edition:2nd ed. 2020.
Language:English
Series:Synthesis Lectures on Computer Architecture,
Physical Description:1 online resource (XX, 276 p.)
Tags: Add Tag
No Tags, Be the first to tag this record!
LEADER 03889nam a22005415i 4500
001 993599261304498
005 20230801193511.0
007 cr#nn#008mamaa
008 220601s2020 sz | o |||| 0|eng d
020 |a 3-031-01764-1 
024 7 |a 10.1007/978-3-031-01764-3  |2 doi 
035 |a (CKB)5580000000324008 
035 |a (DE-He213)978-3-031-01764-3 
035 |a (MiAaPQ)EBC6145027 
035 |a (EXLCZ)995580000000324008 
050 4 |a TK7867-7867.5 
072 7 |a TJFC  |2 bicssc 
072 7 |a TEC008010  |2 bisacsh 
072 7 |a TJFC  |2 thema 
082 0 4 |a 621.3815  |2 23 
100 1 |a Nagarajan, Vijay.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
245 1 2 |a A Primer on Memory Consistency and Cache Coherence, Second Edition /  |c by Vijay Nagarajan, Daniel J. Sorin, Mark D. Hill, David A. Wood. 
250 |a 2nd ed. 2020. 
264 1 |a Cham :  |b Springer International Publishing :  |b Imprint: Springer,  |c 2020. 
300 |a 1 online resource (XX, 276 p.) 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
490 1 |a Synthesis Lectures on Computer Architecture,  |x 1935-3243 
505 0 |a Preface to the Second Edition -- Preface to the First Edition -- Introduction to Consistency and Coherence -- Coherence Basics -- Memory Consistency Motivation and Sequential Consistency -- Total Store Order and the \lowercase {X -- Relaxed Memory Consistency -- Coherence Protocols -- Snooping Coherence Protocols -- Directory Coherence Protocols -- Advanced Topics in Coherence -- Consistency and Coherence for Heterogeneous Systems -- Specifying and Validating Memory Consistency Models and Cache Coherence -- Authors' Biographies . 
520 |a Many modern computer systems, including homogeneous and heterogeneous architectures, support shared memory in hardware. In a shared memory system, each of the processor cores may read and write to a single shared address space. For a shared memory machine, the memory consistency model defines the architecturally visible behavior of its memory system. Consistency definitions provide rules about loads and stores (or memory reads and writes) and how they act upon memory. As part of supporting a memory consistency model, many machines also provide cache coherence protocols that ensure that multiple cached copies of data are kept up-to-date. The goal of this primer is to provide readers with a basic understanding of consistency and coherence. This understanding includes both the issues that must be solved as well as a variety of solutions. We present both high-level concepts as well as specific, concrete examples from real-world systems. This second edition reflects a decade of advancements since the first edition and includes, among other more modest changes, two new chapters: one on consistency and coherence for non-CPU accelerators (with a focus on GPUs) and one that points to formal work and tools on consistency and coherence. 
506 0 |a Open Access 
650 0 |a Electronic circuits. 
650 0 |a Microprocessors. 
650 0 |a Computer architecture. 
650 1 4 |a Electronic Circuits and Systems. 
650 2 4 |a Processor Architectures. 
776 |z 3-031-00061-7 
776 |z 3-031-00636-4 
700 1 |a Sorin, Daniel J.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
700 1 |a Hill, Mark D.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
700 1 |a Wood, David A.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
830 0 |a Synthesis Lectures on Computer Architecture,  |x 1935-3243 
906 |a BOOK 
ADM |b 2024-07-25 05:52:10 Europe/Vienna  |d 00  |f system  |c marc21  |a 2022-06-08 16:08:14 Europe/Vienna  |g false 
AVE |i DOAB Directory of Open Access Books  |P DOAB Directory of Open Access Books  |x https://eu02.alma.exlibrisgroup.com/view/uresolver/43ACC_OEAW/openurl?u.ignore_date_coverage=true&portfolio_pid=5345557540004498&Force_direct=true  |Z 5345557540004498  |b Available  |8 5345557540004498