Wafer-level testing and test during burn-in for integrated circuits / Sudarshan Bahukudumbi, Krishnendu Chakrabarty.

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Superior document:Artech House integrated microsystems series
:
TeilnehmendeR:
Year of Publication:2010
Language:English
Series:Artech House integrated microsystems series.
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Physical Description:xv, 198 p. :; ill.
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id 500946559
ctrlnum (MiAaPQ)500946559
(Au-PeEL)EBL946559
(CaPaEBR)ebr10412729
(OCoLC)796382946
collection bib_alma
fullrecord <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01487nam a2200385Ia 4500</leader><controlfield tag="001">500946559</controlfield><controlfield tag="003">MiAaPQ</controlfield><controlfield tag="005">20200520144314.0</controlfield><controlfield tag="006">m o d | </controlfield><controlfield tag="007">cr cn|||||||||</controlfield><controlfield tag="008">091005s2010 maua sb 001 0 eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="z">9781596939899</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="z">1596939893</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(MiAaPQ)500946559</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(Au-PeEL)EBL946559</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(CaPaEBR)ebr10412729</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)796382946</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">MiAaPQ</subfield><subfield code="c">MiAaPQ</subfield><subfield code="d">MiAaPQ</subfield></datafield><datafield tag="050" ind1=" " ind2="4"><subfield code="a">TK7874</subfield><subfield code="b">.B35 2010</subfield></datafield><datafield tag="082" ind1="0" ind2="4"><subfield code="a">621.38132</subfield><subfield code="2">22</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Bahukudumbi, Sudarshan.</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Wafer-level testing and test during burn-in for integrated circuits</subfield><subfield code="h">[electronic resource] /</subfield><subfield code="c">Sudarshan Bahukudumbi, Krishnendu Chakrabarty.</subfield></datafield><datafield tag="260" ind1=" " ind2=" "><subfield code="a">Boston :</subfield><subfield code="b">Artech House,</subfield><subfield code="c">2010.</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">xv, 198 p. :</subfield><subfield code="b">ill.</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">Artech House integrated microsystems series</subfield></datafield><datafield tag="504" ind1=" " ind2=" "><subfield code="a">Includes bibliographical references and index.</subfield></datafield><datafield tag="533" ind1=" " ind2=" "><subfield code="a">Electronic reproduction. Ann Arbor, MI : ProQuest, 2015. Available via World Wide Web. Access may be limited to ProQuest affiliated libraries.</subfield></datafield><datafield tag="650" ind1=" " ind2="0"><subfield code="a">Integrated circuits</subfield><subfield code="x">Testing.</subfield></datafield><datafield tag="650" ind1=" " ind2="0"><subfield code="a">Integrated circuits</subfield><subfield code="x">Wafer-scale integration.</subfield></datafield><datafield tag="650" ind1=" " ind2="0"><subfield code="a">Semiconductors</subfield><subfield code="x">Testing.</subfield></datafield><datafield tag="655" ind1=" " ind2="4"><subfield code="a">Electronic books.</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Chakrabarty, Krishnendu.</subfield></datafield><datafield tag="710" ind1="2" ind2=" "><subfield code="a">ProQuest (Firm)</subfield></datafield><datafield tag="830" ind1=" " ind2="0"><subfield code="a">Artech House integrated microsystems series.</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">https://ebookcentral.proquest.com/lib/oeawat/detail.action?docID=946559</subfield><subfield code="z">Click to View</subfield></datafield></record></collection>
record_format marc
spelling Bahukudumbi, Sudarshan.
Wafer-level testing and test during burn-in for integrated circuits [electronic resource] / Sudarshan Bahukudumbi, Krishnendu Chakrabarty.
Boston : Artech House, 2010.
xv, 198 p. : ill.
Artech House integrated microsystems series
Includes bibliographical references and index.
Electronic reproduction. Ann Arbor, MI : ProQuest, 2015. Available via World Wide Web. Access may be limited to ProQuest affiliated libraries.
Integrated circuits Testing.
Integrated circuits Wafer-scale integration.
Semiconductors Testing.
Electronic books.
Chakrabarty, Krishnendu.
ProQuest (Firm)
Artech House integrated microsystems series.
https://ebookcentral.proquest.com/lib/oeawat/detail.action?docID=946559 Click to View
language English
format Electronic
eBook
author Bahukudumbi, Sudarshan.
spellingShingle Bahukudumbi, Sudarshan.
Wafer-level testing and test during burn-in for integrated circuits
Artech House integrated microsystems series
author_facet Bahukudumbi, Sudarshan.
Chakrabarty, Krishnendu.
ProQuest (Firm)
ProQuest (Firm)
author_variant s b sb
author2 Chakrabarty, Krishnendu.
ProQuest (Firm)
author2_variant k c kc
author2_role TeilnehmendeR
TeilnehmendeR
author_corporate ProQuest (Firm)
author_sort Bahukudumbi, Sudarshan.
title Wafer-level testing and test during burn-in for integrated circuits
title_full Wafer-level testing and test during burn-in for integrated circuits [electronic resource] / Sudarshan Bahukudumbi, Krishnendu Chakrabarty.
title_fullStr Wafer-level testing and test during burn-in for integrated circuits [electronic resource] / Sudarshan Bahukudumbi, Krishnendu Chakrabarty.
title_full_unstemmed Wafer-level testing and test during burn-in for integrated circuits [electronic resource] / Sudarshan Bahukudumbi, Krishnendu Chakrabarty.
title_auth Wafer-level testing and test during burn-in for integrated circuits
title_new Wafer-level testing and test during burn-in for integrated circuits
title_sort wafer-level testing and test during burn-in for integrated circuits
series Artech House integrated microsystems series
series2 Artech House integrated microsystems series
publisher Artech House,
publishDate 2010
physical xv, 198 p. : ill.
callnumber-first T - Technology
callnumber-subject TK - Electrical and Nuclear Engineering
callnumber-label TK7874
callnumber-sort TK 47874 B35 42010
genre Electronic books.
genre_facet Electronic books.
url https://ebookcentral.proquest.com/lib/oeawat/detail.action?docID=946559
illustrated Illustrated
dewey-hundreds 600 - Technology
dewey-tens 620 - Engineering
dewey-ones 621 - Applied physics
dewey-full 621.38132
dewey-sort 3621.38132
dewey-raw 621.38132
dewey-search 621.38132
oclc_num 796382946
work_keys_str_mv AT bahukudumbisudarshan waferleveltestingandtestduringburninforintegratedcircuits
AT chakrabartykrishnendu waferleveltestingandtestduringburninforintegratedcircuits
AT proquestfirm waferleveltestingandtestduringburninforintegratedcircuits
status_str n
ids_txt_mv (MiAaPQ)500946559
(Au-PeEL)EBL946559
(CaPaEBR)ebr10412729
(OCoLC)796382946
hierarchy_parent_title Artech House integrated microsystems series
is_hierarchy_title Wafer-level testing and test during burn-in for integrated circuits
container_title Artech House integrated microsystems series
author2_original_writing_str_mv noLinkedField
noLinkedField
_version_ 1792330732202360833