Low Power Memory/Memristor Devices and Systems / / by Alex Serb, Adnan Mehonic (editors).
This book focusses on achieving low-power computation using memristive devices. The topic was designed as a convenient reference point: it contains a mix of techniques starting from the fundamental manufacturing of memristive devices all the way to applications such as physically unclonable function...
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Place / Publishing House: | [Place of publication not identified] : : MDPI - Multidisciplinary Digital Publishing Institute,, 2023. |
Year of Publication: | 2023 |
Language: | English |
Physical Description: | 1 online resource (250 pages) |
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Low Power Memory/Memristor Devices and Systems / by Alex Serb, Adnan Mehonic (editors). [Place of publication not identified] : MDPI - Multidisciplinary Digital Publishing Institute, 2023. 1 online resource (250 pages) text txt rdacontent computer c rdamedia online resource cr rdacarrier Description based on publisher supplied metadata and other sources. This book focusses on achieving low-power computation using memristive devices. The topic was designed as a convenient reference point: it contains a mix of techniques starting from the fundamental manufacturing of memristive devices all the way to applications such as physically unclonable functions, and also covers perspectives on, e.g., in-memory computing, which is inextricably linked with emerging memory devices such as memristors. Finally, the book contains a few articles representing how other communities (from typical CMOS design to photonics) are fighting on their own fronts in the quest towards low-power computation, as a comparison with the memristor literature. We hope that readers will enjoy discovering the articles within. In English. Preface to "Low Power Memory/Memristor Devices and Systems" vii -- A Novel Inductorless Design Technique for Linear Equalization in Optical Receivers 1 -- Towards Integration of a Dedicated Memory Controller and Its Instruction Set to Improve Performance of Systems Containing Computational SRAM 21 -- Silicon-Compatible Memristive Devices Tailored by Laser and Thermal Treatments 33 -- Design of In-Memory Parallel-Prefix Adders 55 -- A New Physical Design Flow for a Selective State Retention Based Approach 71 -- Energy-Efficient Non-Von Neumann Computing Architecture Supporting Multiple Computing Paradigms for Logic and Binarized Neural Networks 87 -- Minimization of the Line Resistance Impact on Memdiode-Based Simulations of Multilayer Perceptron Arrays Applied to Pattern Recognition 105 -- A Morphable Physically Unclonable Function and True Random Number Generator Using a Commercial Magnetic Memory 123 -- Continuous-Time Programming of Floating-Gate Transistors for Nonvolatile Analog Memory Arrays † 139 -- Logic-in-Memory Computation: Is It Worth It? A Binary Neural Network Case Study 161 -- Rediscovering Majority Logic in the Post-CMOS Era: A Perspective from In-Memory Computing 195 -- Graph Coloring via Locally-Active Memristor Oscillatory Networks 211. Memristors Congresses. Electric resistors Congresses. 3-0365-6185-4 Serb, Alex, editor. Mehonic, Adnan, editor. |
language |
English |
format |
eBook |
author2 |
Serb, Alex, Mehonic, Adnan, |
author_facet |
Serb, Alex, Mehonic, Adnan, |
author2_variant |
a s as a m am |
author2_role |
TeilnehmendeR TeilnehmendeR |
title |
Low Power Memory/Memristor Devices and Systems / |
spellingShingle |
Low Power Memory/Memristor Devices and Systems / Preface to "Low Power Memory/Memristor Devices and Systems" vii -- A Novel Inductorless Design Technique for Linear Equalization in Optical Receivers 1 -- Towards Integration of a Dedicated Memory Controller and Its Instruction Set to Improve Performance of Systems Containing Computational SRAM 21 -- Silicon-Compatible Memristive Devices Tailored by Laser and Thermal Treatments 33 -- Design of In-Memory Parallel-Prefix Adders 55 -- A New Physical Design Flow for a Selective State Retention Based Approach 71 -- Energy-Efficient Non-Von Neumann Computing Architecture Supporting Multiple Computing Paradigms for Logic and Binarized Neural Networks 87 -- Minimization of the Line Resistance Impact on Memdiode-Based Simulations of Multilayer Perceptron Arrays Applied to Pattern Recognition 105 -- A Morphable Physically Unclonable Function and True Random Number Generator Using a Commercial Magnetic Memory 123 -- Continuous-Time Programming of Floating-Gate Transistors for Nonvolatile Analog Memory Arrays † 139 -- Logic-in-Memory Computation: Is It Worth It? A Binary Neural Network Case Study 161 -- Rediscovering Majority Logic in the Post-CMOS Era: A Perspective from In-Memory Computing 195 -- Graph Coloring via Locally-Active Memristor Oscillatory Networks 211. |
title_full |
Low Power Memory/Memristor Devices and Systems / by Alex Serb, Adnan Mehonic (editors). |
title_fullStr |
Low Power Memory/Memristor Devices and Systems / by Alex Serb, Adnan Mehonic (editors). |
title_full_unstemmed |
Low Power Memory/Memristor Devices and Systems / by Alex Serb, Adnan Mehonic (editors). |
title_auth |
Low Power Memory/Memristor Devices and Systems / |
title_new |
Low Power Memory/Memristor Devices and Systems / |
title_sort |
low power memory/memristor devices and systems / |
publisher |
MDPI - Multidisciplinary Digital Publishing Institute, |
publishDate |
2023 |
physical |
1 online resource (250 pages) |
contents |
Preface to "Low Power Memory/Memristor Devices and Systems" vii -- A Novel Inductorless Design Technique for Linear Equalization in Optical Receivers 1 -- Towards Integration of a Dedicated Memory Controller and Its Instruction Set to Improve Performance of Systems Containing Computational SRAM 21 -- Silicon-Compatible Memristive Devices Tailored by Laser and Thermal Treatments 33 -- Design of In-Memory Parallel-Prefix Adders 55 -- A New Physical Design Flow for a Selective State Retention Based Approach 71 -- Energy-Efficient Non-Von Neumann Computing Architecture Supporting Multiple Computing Paradigms for Logic and Binarized Neural Networks 87 -- Minimization of the Line Resistance Impact on Memdiode-Based Simulations of Multilayer Perceptron Arrays Applied to Pattern Recognition 105 -- A Morphable Physically Unclonable Function and True Random Number Generator Using a Commercial Magnetic Memory 123 -- Continuous-Time Programming of Floating-Gate Transistors for Nonvolatile Analog Memory Arrays † 139 -- Logic-in-Memory Computation: Is It Worth It? A Binary Neural Network Case Study 161 -- Rediscovering Majority Logic in the Post-CMOS Era: A Perspective from In-Memory Computing 195 -- Graph Coloring via Locally-Active Memristor Oscillatory Networks 211. |
isbn |
3-0365-6186-2 3-0365-6185-4 |
callnumber-first |
T - Technology |
callnumber-subject |
TK - Electrical and Nuclear Engineering |
callnumber-label |
TK7872 |
callnumber-sort |
TK 47872 R4 L69 42023 |
genre_facet |
Congresses. |
illustrated |
Not Illustrated |
dewey-hundreds |
600 - Technology |
dewey-tens |
620 - Engineering |
dewey-ones |
621 - Applied physics |
dewey-full |
621.38154 |
dewey-sort |
3621.38154 |
dewey-raw |
621.38154 |
dewey-search |
621.38154 |
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AT serbalex lowpowermemorymemristordevicesandsystems AT mehonicadnan lowpowermemorymemristordevicesandsystems |
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Low Power Memory/Memristor Devices and Systems / |
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