Computer Aided Verification : : 33rd International Conference, CAV 2021, Virtual Event, July 20–23, 2021, Proceedings, Part I / / edited by Alexandra Silva, K. Rustan M. Leino.
This open access two-volume set LNCS 12759 and 12760 constitutes the refereed proceedings of the 33rd International Conference on Computer Aided Verification, CAV 2021, held virtually in July 2021. The 63 full papers presented together with 16 tool papers and 5 invited papers were carefully reviewed...
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Place / Publishing House: | Cham : : Springer International Publishing :, Imprint: Springer,, 2021. |
Year of Publication: | 2021 |
Edition: | 1st ed. 2021. |
Language: | English |
Series: | Theoretical Computer Science and General Issues,
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Physical Description: | 1 online resource (939 p.) |
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(CKB)5470000000830883 EBL6679367 (AU-PeEL)EBL6679367 (oapen)https://directory.doabooks.org/handle/20.500.12854/71643 (DE-He213)978-3-030-81685-8 (MiAaPQ)EBC6679367 (PPN)257359001 (EXLCZ)995470000000830883 |
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Silva, Alexandra. Computer Aided Verification : 33rd International Conference, CAV 2021, Virtual Event, July 20–23, 2021, Proceedings, Part I / edited by Alexandra Silva, K. Rustan M. Leino. 1st ed. 2021. Cham : Springer International Publishing : Imprint: Springer, 2021. 1 online resource (939 p.) text txt rdacontent computer c rdamedia online resource cr rdacarrier Theoretical Computer Science and General Issues, 2512-2029 ; 12759 Description based upon print version of record. English This open access two-volume set LNCS 12759 and 12760 constitutes the refereed proceedings of the 33rd International Conference on Computer Aided Verification, CAV 2021, held virtually in July 2021. The 63 full papers presented together with 16 tool papers and 5 invited papers were carefully reviewed and selected from 290 submissions. The papers were organized in the following topical sections: Part I: invited papers; AI verification; concurrency and blockchain; hybrid and cyber-physical systems; security; and synthesis. Part II: complexity and termination; decision procedures and solvers; hardware and model checking; logical foundations; and software verification. This is an open access book. Invited Papers -- NNrepair: Constraint-based Repair of Neural Network Classifiers -- Balancing automation and control for formal verification of microprocessors -- Algebraic Program Analysis -- Programmable Program Synthesis -- Deductive Synthesis of Programs with Pointers: Techniques, Challenges, Opportunities -- AI Verification -- DNNV: A Framework for Deep Neural Network Verification -- Robustness Verification of Quantum Classifiers -- BDD4BNN: A BDD-based Quantitative Analysis Framework for Binarized Neural Networks -- Automated Safety Verification of Programs Invoking Neural Networks -- Scalable Polyhedral Verification of Recurrent Neural Networks -- Verisig 2.0: Verification of Neural Network Controllers Using Taylor Model Preconditioning -- Robustness Verification of Semantic Segmentation Neural Networks using Relaxed Reachability -- PEREGRiNN: Penalized-Relaxation Greedy Neural Network Verifier -- Concurrency and Blockchain -- Isla: Integrating full-scale ISA semantics and axiomatic concurrency models -- Summing Up Smart Transitions -- Stateless Model Checking under a Reads-Value-From Equivalence -- Gobra: Modular Specification and Verification of Go Programs -- Delay-Bounded Scheduling Without Delay! -- Checking Data-Race Freedom of GPU Kernels, Compositionally -- GenMC: A Model Checker for Weak Memory Models -- Hybrid and Cyber-Physical Systems -- Synthesizing Invariant Barrier Certificates via Difference-of-Convex Programming -- An Iterative Scheme of Safe Reinforcement Learning for Nonlinear Systems via Barrier Certificate Generation -- HybridSynchAADL: Modeling and Formal Analysis of Virtually Synchronous CPSs in AADL -- Computing Bottom SCCs Symbolically Using Transition Guided Reduction -- Implicit Semi-Algebraic Abstraction for Polynomial Dynamical Systems -- IMITATOR 3: Synthesis of timing parameters beyond decidability -- Formally Verified Switching Logic for Recoverability of Aircraft Controller -- SceneChecker: Boosting Scenario Verification using Symmetry Abstractions -- Effective Hybrid System Falsification Using Monte Carlo Tree Search Guided by QB-Robustness -- Fast zone-based algorithms for reachability in pushdown timed automata -- Security -- Verified Cryptographic Code for Everybody -- Not All Bugs Are Created Equal, But Robust Reachability Can Tell The Difference -- A Temporal Logic for Asynchronous Hyperproperties -- Product Programs in the Wild: Retrofitting Program Verifiers to Check Information Flow Security -- Constraint-based Relational Verification -- Pre-Deployment Security Assessment for Cloud Services through Semantic Reasoning -- Synthesis -- Synthesis with Asymptotic Resource Bounds -- Program Sketching by Automatically Generating Mocks from Tests -- Counterexample-Guided Partial Bounding for Recursive Function Synthesis -- PAYNT: A Tool for Inductive Synthesis of Probabilistic Programs -- Adapting Behaviors via Reactive Synthesis -- Causality-based Game Solving. Open Access Software engineering. Artificial intelligence. Computer science. Machine theory. Computer simulation. Software Engineering. Artificial Intelligence. Computer Science Logic and Foundations of Programming. Formal Languages and Automata Theory. Computer Modelling. 3-030-81684-2 Leino, K. Rustan M. |
language |
English |
format |
eBook |
author |
Silva, Alexandra. |
spellingShingle |
Silva, Alexandra. Computer Aided Verification : 33rd International Conference, CAV 2021, Virtual Event, July 20–23, 2021, Proceedings, Part I / Theoretical Computer Science and General Issues, Invited Papers -- NNrepair: Constraint-based Repair of Neural Network Classifiers -- Balancing automation and control for formal verification of microprocessors -- Algebraic Program Analysis -- Programmable Program Synthesis -- Deductive Synthesis of Programs with Pointers: Techniques, Challenges, Opportunities -- AI Verification -- DNNV: A Framework for Deep Neural Network Verification -- Robustness Verification of Quantum Classifiers -- BDD4BNN: A BDD-based Quantitative Analysis Framework for Binarized Neural Networks -- Automated Safety Verification of Programs Invoking Neural Networks -- Scalable Polyhedral Verification of Recurrent Neural Networks -- Verisig 2.0: Verification of Neural Network Controllers Using Taylor Model Preconditioning -- Robustness Verification of Semantic Segmentation Neural Networks using Relaxed Reachability -- PEREGRiNN: Penalized-Relaxation Greedy Neural Network Verifier -- Concurrency and Blockchain -- Isla: Integrating full-scale ISA semantics and axiomatic concurrency models -- Summing Up Smart Transitions -- Stateless Model Checking under a Reads-Value-From Equivalence -- Gobra: Modular Specification and Verification of Go Programs -- Delay-Bounded Scheduling Without Delay! -- Checking Data-Race Freedom of GPU Kernels, Compositionally -- GenMC: A Model Checker for Weak Memory Models -- Hybrid and Cyber-Physical Systems -- Synthesizing Invariant Barrier Certificates via Difference-of-Convex Programming -- An Iterative Scheme of Safe Reinforcement Learning for Nonlinear Systems via Barrier Certificate Generation -- HybridSynchAADL: Modeling and Formal Analysis of Virtually Synchronous CPSs in AADL -- Computing Bottom SCCs Symbolically Using Transition Guided Reduction -- Implicit Semi-Algebraic Abstraction for Polynomial Dynamical Systems -- IMITATOR 3: Synthesis of timing parameters beyond decidability -- Formally Verified Switching Logic for Recoverability of Aircraft Controller -- SceneChecker: Boosting Scenario Verification using Symmetry Abstractions -- Effective Hybrid System Falsification Using Monte Carlo Tree Search Guided by QB-Robustness -- Fast zone-based algorithms for reachability in pushdown timed automata -- Security -- Verified Cryptographic Code for Everybody -- Not All Bugs Are Created Equal, But Robust Reachability Can Tell The Difference -- A Temporal Logic for Asynchronous Hyperproperties -- Product Programs in the Wild: Retrofitting Program Verifiers to Check Information Flow Security -- Constraint-based Relational Verification -- Pre-Deployment Security Assessment for Cloud Services through Semantic Reasoning -- Synthesis -- Synthesis with Asymptotic Resource Bounds -- Program Sketching by Automatically Generating Mocks from Tests -- Counterexample-Guided Partial Bounding for Recursive Function Synthesis -- PAYNT: A Tool for Inductive Synthesis of Probabilistic Programs -- Adapting Behaviors via Reactive Synthesis -- Causality-based Game Solving. |
author_facet |
Silva, Alexandra. Leino, K. Rustan M. |
author_variant |
a s as |
author2 |
Leino, K. Rustan M. |
author2_variant |
k r m l krm krml |
author2_role |
TeilnehmendeR |
author_sort |
Silva, Alexandra. |
title |
Computer Aided Verification : 33rd International Conference, CAV 2021, Virtual Event, July 20–23, 2021, Proceedings, Part I / |
title_sub |
33rd International Conference, CAV 2021, Virtual Event, July 20–23, 2021, Proceedings, Part I / |
title_full |
Computer Aided Verification : 33rd International Conference, CAV 2021, Virtual Event, July 20–23, 2021, Proceedings, Part I / edited by Alexandra Silva, K. Rustan M. Leino. |
title_fullStr |
Computer Aided Verification : 33rd International Conference, CAV 2021, Virtual Event, July 20–23, 2021, Proceedings, Part I / edited by Alexandra Silva, K. Rustan M. Leino. |
title_full_unstemmed |
Computer Aided Verification : 33rd International Conference, CAV 2021, Virtual Event, July 20–23, 2021, Proceedings, Part I / edited by Alexandra Silva, K. Rustan M. Leino. |
title_auth |
Computer Aided Verification : 33rd International Conference, CAV 2021, Virtual Event, July 20–23, 2021, Proceedings, Part I / |
title_new |
Computer Aided Verification : |
title_sort |
computer aided verification : 33rd international conference, cav 2021, virtual event, july 20–23, 2021, proceedings, part i / |
series |
Theoretical Computer Science and General Issues, |
series2 |
Theoretical Computer Science and General Issues, |
publisher |
Springer International Publishing : Imprint: Springer, |
publishDate |
2021 |
physical |
1 online resource (939 p.) |
edition |
1st ed. 2021. |
contents |
Invited Papers -- NNrepair: Constraint-based Repair of Neural Network Classifiers -- Balancing automation and control for formal verification of microprocessors -- Algebraic Program Analysis -- Programmable Program Synthesis -- Deductive Synthesis of Programs with Pointers: Techniques, Challenges, Opportunities -- AI Verification -- DNNV: A Framework for Deep Neural Network Verification -- Robustness Verification of Quantum Classifiers -- BDD4BNN: A BDD-based Quantitative Analysis Framework for Binarized Neural Networks -- Automated Safety Verification of Programs Invoking Neural Networks -- Scalable Polyhedral Verification of Recurrent Neural Networks -- Verisig 2.0: Verification of Neural Network Controllers Using Taylor Model Preconditioning -- Robustness Verification of Semantic Segmentation Neural Networks using Relaxed Reachability -- PEREGRiNN: Penalized-Relaxation Greedy Neural Network Verifier -- Concurrency and Blockchain -- Isla: Integrating full-scale ISA semantics and axiomatic concurrency models -- Summing Up Smart Transitions -- Stateless Model Checking under a Reads-Value-From Equivalence -- Gobra: Modular Specification and Verification of Go Programs -- Delay-Bounded Scheduling Without Delay! -- Checking Data-Race Freedom of GPU Kernels, Compositionally -- GenMC: A Model Checker for Weak Memory Models -- Hybrid and Cyber-Physical Systems -- Synthesizing Invariant Barrier Certificates via Difference-of-Convex Programming -- An Iterative Scheme of Safe Reinforcement Learning for Nonlinear Systems via Barrier Certificate Generation -- HybridSynchAADL: Modeling and Formal Analysis of Virtually Synchronous CPSs in AADL -- Computing Bottom SCCs Symbolically Using Transition Guided Reduction -- Implicit Semi-Algebraic Abstraction for Polynomial Dynamical Systems -- IMITATOR 3: Synthesis of timing parameters beyond decidability -- Formally Verified Switching Logic for Recoverability of Aircraft Controller -- SceneChecker: Boosting Scenario Verification using Symmetry Abstractions -- Effective Hybrid System Falsification Using Monte Carlo Tree Search Guided by QB-Robustness -- Fast zone-based algorithms for reachability in pushdown timed automata -- Security -- Verified Cryptographic Code for Everybody -- Not All Bugs Are Created Equal, But Robust Reachability Can Tell The Difference -- A Temporal Logic for Asynchronous Hyperproperties -- Product Programs in the Wild: Retrofitting Program Verifiers to Check Information Flow Security -- Constraint-based Relational Verification -- Pre-Deployment Security Assessment for Cloud Services through Semantic Reasoning -- Synthesis -- Synthesis with Asymptotic Resource Bounds -- Program Sketching by Automatically Generating Mocks from Tests -- Counterexample-Guided Partial Bounding for Recursive Function Synthesis -- PAYNT: A Tool for Inductive Synthesis of Probabilistic Programs -- Adapting Behaviors via Reactive Synthesis -- Causality-based Game Solving. |
isbn |
3-030-81685-0 3-030-81684-2 |
issn |
2512-2029 ; |
callnumber-first |
Q - Science |
callnumber-subject |
QA - Mathematics |
callnumber-label |
QA76 |
callnumber-sort |
QA 276.758 |
illustrated |
Not Illustrated |
dewey-hundreds |
000 - Computer science, information & general works |
dewey-tens |
000 - Computer science, knowledge & systems |
dewey-ones |
005 - Computer programming, programs & data |
dewey-full |
005.1 |
dewey-sort |
15.1 |
dewey-raw |
005.1 |
dewey-search |
005.1 |
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