Design for embedded image processing on FPGAs / Donald G. Bailey.

"Introductory material will consider the problem of embedded image processing, and how some of the issues may be solved using parallel hardware solutions. Field programmable gate arrays (FPGAs) are introduced as a technology that provides flexible, fine-grained hardware that can readily exploit...

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Year of Publication:2011
Language:English
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Physical Description:xvi, 482 p., [6] p. of plates :; ill. (some col.)
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LEADER 03199nam a2200421 a 4500
001 500693370
003 MiAaPQ
005 20200520144314.0
006 m o d |
007 cr cn|||||||||
008 110225s2011 si af sb 001 0 eng d
010 |z  2011002991 
020 |z 9781118073315 (Mobi) 
020 |z 9780470828496 
020 |a 9780470828519 (electronic bk.) 
020 |a 9780470828526 (electronic bk.) 
020 |a 9780470828502 (electronic bk.) 
035 |a (MiAaPQ)500693370 
035 |a (Au-PeEL)EBL693370 
035 |a (CaPaEBR)ebr10483240 
035 |a (CaONFJC)MIL317516 
035 |a (OCoLC)747426562 
040 |a MiAaPQ  |c MiAaPQ  |d MiAaPQ 
050 4 |a TK7895.E42  |b B3264 2011 
082 0 4 |a 621.39/9  |2 22 
100 1 |a Bailey, Donald G.  |q (Donald Graeme),  |d 1962- 
245 1 0 |a Design for embedded image processing on FPGAs  |h [electronic resource] /  |c Donald G. Bailey. 
260 |a Singapore ;  |a New York, N.Y. :  |b Wiley,  |c 2011. 
300 |a xvi, 482 p., [6] p. of plates :  |b ill. (some col.) 
504 |a Includes bibliographical references and index. 
520 |a "Introductory material will consider the problem of embedded image processing, and how some of the issues may be solved using parallel hardware solutions. Field programmable gate arrays (FPGAs) are introduced as a technology that provides flexible, fine-grained hardware that can readily exploit parallelism within many image processing algorithms. A brief review of FPGA programming languages provides the link between a software mindset normally associated with image processing algorithms, and the hardware mindset required for efficient utilization of a parallel hardware design. The bulk of the book will focus on the design process, and in particular how designing an FPGA implementation differs from a conventional software implementation. Particular attention is given to the techniques for mapping an algorithm onto an FPGA implementation, considering timing, memory bandwidth and resource constraints, and efficient hardware computational techniques. Extensive coverage will be given of a range of image processing operations, discussing efficient implementations and how these may vary according to the application. The techniques will be illustrated with several example applications or case studies from projects or applications I have been involves with. Issues such as interfacing between the FPGA and peripheral devices will be covered briefly, as will designing the system in such a way that it can be more readily debugged and tuned"--  |c Provided by publisher. 
520 |a "The bulk of the book will focus on the design process, and in particular how designing an FPGA implementation differs from a conventional software implementation"--  |c Provided by publisher. 
533 |a Electronic reproduction. Ann Arbor, MI : ProQuest, 2015. Available via World Wide Web. Access may be limited to ProQuest affiliated libraries. 
650 0 |a Embedded computer systems. 
650 0 |a Field programmable gate arrays. 
655 4 |a Electronic books. 
710 2 |a ProQuest (Firm) 
856 4 0 |u https://ebookcentral.proquest.com/lib/oeawat/detail.action?docID=693370  |z Click to View