Hybrid parallel execution model for logic-based specification languages / Jeffrey J.P. Tsai, Bing Li.
Saved in:
Superior document: | Series on software engineering and knowledge engineering ; v. 10 |
---|---|
: | |
TeilnehmendeR: | |
Year of Publication: | 2001 |
Language: | English |
Series: | Series on software engineering and knowledge engineering ;
v. 10. |
Online Access: | |
Physical Description: | xii, 214 p. :; ill. |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
VHDL for logic synthesis / Andrew Rushton.
by: Rushton, Andrew.
Published: (2011.) -
FSM-based digital design using Verilog HDL / Peter Minns, Ian Elliott.
by: Minns, Peter D.
Published: (c2008.) -
SystemVerilog assertions and functional coverage : : guide to language, methodology and applications / / Ashok B. Mehta.
by: Mehta, Ashok B.,
Published: (2016.) -
VHDL-2008 : just the new stuff / / Peter J. Ashenden, Jim Lewis.
by: Ashenden, Peter J.
Published: (c2008.) -
Image Understanding by Socializing the Semantic Gap / / Tiberio Uricchio.
by: Uricchio, Tiberio,
Published: (2017.)